I want to generate a frequency of 8192Hz using the overflow on the RTC, by dividing the external crystal (32768Hz) by 4. Is this possible... if so what should the RTC division and initial count value be?
Hi James, If you want get the 8192Hz clock frequency from the RTC module, don’t use the overflow of the RTC counter. Instead, use the RTC prescaler and the RTC_Second signal because the prescaler can automatic reload itself value but RTC counter do not. You can set the RTC_PRL register to 3 (32.768KH/(RTC_PRL+1) = 8192Hz). If you want get 8192Hz interrupts you have to enable the Second Interrupt bit (SECIE) at the RTC_CRH register. If you want get the RTC 8192Hz clock output from the chip, the best way is to enable the TAMPER pin (PC13) for the direct RTC Second pulse output so you don’t need to generate the 8192 times/sec interrupt and set the GPIO pin to output. This can be done by setting the ASOE and ASOS bits of RTC clock calibration register (BKP_RTCCR) to 1. Be aware that to set the RTC registers the peripheral must enter Configuration Mode. This is done by setting the CNF bit in the RTC_CRL register. The configuration procedure is: 1. Poll RTC_CR register RTOFF bit, wait until its value goes to ‘1’ 2. Set the CNF bit in the RTC_CRL register to enter configuration mode 3. Write to one or more RTC registers 4. Clear the CNF bit to exit configuration mode 5. Poll RTOFF, wait until its value goes to ‘1’ to check the end of the write operation.
STMicroelectronics has provided library (STM3210x_LIB) for user to easy set the registers. You can look at the example code at ..\STM32F10x_LIB\examples\RTC for how to enable and set the RTC registers using the library functions.
Ok so I have configured the pre-scaler with 3 and enabled the RTC_Second interrupt in configuration mode.
I don't need to output the frequency, but in my main loop I want to go to sleep and wake up every 8192Hz. I am using the __WFE(); function, but nothing is happening. Do I need anything else in the main loop...?
Hi James, 1. Did you enable the LSE clock? LSE the clock for the external 32.768KHz crystal or ceramic resonator. The LSE crystal is switched on and off using the LSEON bit in Backup domain control register (RCC_BDCR). Alternatively, you can use LSI, the low power internal clock as the RTC source. 2. Did you set the RTC source correctly? The RTC source could be selected from 3 sources: LSE, LSI and HSE (divided by 128). See the clock tree (Picture 7 at the STMF10x reference manual). This is selected by programming the RTCSEL[1:0] bits in the Backup domain control register (RCC_BDCR). 3. Make sure the RTC module is enabled. This is set by the RTCEN bit in the Backup domain control register (RCC_BDCR) and its default value is off. You have to turn the RTC module on in order to use it. To check if RTC works, first don’t put the CPU in sleep mode, instead you use a for(; loop to replace the __WFE(). You can pause the application and check the value in RTC prescaler divider register RTC_DIVL. If the clock source set correctly and the RTC module is running, each time the RTC_DIVL should have different value (0, 1, 2 or 3). 4. In order to wake up the CPU, you need set the interrupt service routine (ISR) for the RTC Second interrupt. You can use the circleOS library function UTIL_SetIrqHandler( ) to setup the ISR to the right vector. You probably also need to set the NVIC (Nested vectored interrupt controller) similar to my ECG Primer project (ECG_Acquisition.c). In my project I did for DMA1 interrupt service routine. You need to do for the RTC and doing something like this:
NVIC_InitTypeDef NVIC_InitStructure;
/* Configure one bit for preemption priority */ NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
I have now got the program working but having problems with STOP mode, but I'm sure I'll get it working eventually.
Maybe you can help one more time... I want to sample at ideally a frequency of 7281.7777Hz using the RTC, is this possible...? Of course this means a 32768 divided by 4.5. I was trying to do a division of 4, then 5, 4, 5 and so on (the average is 4.5) but the RTC needs 3 clocks after changing the prescaler which is causing a delay.
Hi James, You are welcome. I am not sure what clock rate error and jitter are allowed in your project. It is difficult for get the fraction number of divider without using the phase lock loop (PLL). However, I think you can approach the 7281.7777Hz by following 3 ways:
1. As you described, using the modulator to dynamically change the value in pre-scaler register. Doing 4, 5, 4, ... sequence may not work because the interrupt service routine may come up too late. By the time you get the interrupt service routine triggered, the prescaler load register (RTC_PRL), before you change it, may already re-load the prescaler divider register (RTC_DIV). But you can do 4, 4, 5, 5, 4, 4, ... sequence. The average prescaler value is still 4.5. However it gives you a chance to change the RTC_PRL for next cycle. Just count the interrupts in the interrupt service routine and toggle the RTC_PRL value when it is an even number. However, the target clock jittering is more rough.
2. The LSE clock generator is not limit for 32.768KHz crystal. According to the electric character of LSE it can support up to 1000KHz. If you can find a crystal resonance frequency is integer multiple of the 7281.7777Hz you can replace the 32.768KHz crystal with it and use a integer divider in the RTC. However, it may be difficult to find the exactly resonance frequency.
3. Because you planed to wake up the CPU from the sleep mode, you may be able to use the general purpose timer TIM1 and the high frequency clock (HSE). In sleep mode, the Cortex core stops but all the peripherals are still function. The TIM1 and HSE are still on. Because the clock is in high frequency (16MHz) and it may be easer to find an integer divider to general the target frequency (depends the error allowance).
1) I don't think we can do 4, 4, 5, 5, 4, 4 etc due to the nature of the data and the correlation scheme we are using.
2) I am surprised the LSE can go up to 1MHz. If this is the case then I could use a 65536Hz crystal and divide by 9 to give the exact sampling period, problem solved. I'm sure this would use a bit more power, but nothing compared to using the HSE etc. Where did you find this information? I have looked through the data sheets but can't see this.
3) I have already got the system working at the correct frequency using TIM1 but it simply uses too much current. Actually we will have to use the STOP mode, SLEEP also uses way too much power. The device has to run from a couple of AA alkaline batteries for 6 months...
Hi James, The LSE maximum frequency is described at STM32DataSheet.pdf page 43 Table 20 although there is a note saying it is not tested in production. You can try it.
loop to replace the __WFE(). You can pause the application and check the value in RTC prescaler divider register RTC_DIVL. If the clock source set correctly and the RTC module is running, each time the RTC_DIVL should have different value (0, 1, 2 or 3).