I originally bought an STM32 Primer 2 kit last autumn.
The Ride 7 support and CPU documentations were not applicable to the
CPU in the STM32 Primer 2. For example, neither the provided PDFs
nor the Ride 7 register menus allow you to toggle Timer8 or ADC3
clock enable bits. They are not documented in any of the versions of
the data sheets that I could find either.
I downloaded the latest Ride 7 yesterday. I can now see, e.g., TIM8 in the
Ride 7 debug register widow, but I still cannot enable/disable the timer from Ride 7
while debugging.
Am I missing something obvious?
These are minor problems but make me wonder what else doesn't work.
For example, I am trying to set up a dual-channel ADC1/ADC2 acquisition.
Data is read to memory by DMA1, timing provided by TIM3. This works.
No matter what I do, I cannot trigger the same setup with TIM1. Is this
a code problem or a documentation issue, I wonder? If the timer/adc enable
bit documentation is missing, perhaps the trigger source listing is incorrect as well?
I looked at the STM in order to evaluate the Cortex ARM offerings and possibly
use the CPU in new designs instead of the H8/H2 series devices that I have used so far.
Based on the level of documentation and the evaluation tools, it seems that
the ST ARM offerings are not yet ready for actual product use?
