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# 1   2009-08-13 18:16:54 my apologies for a serious mistake in the code (project: Primer2BasicTest 1.0)

satishgn
Member
From: Mumbai, India
Registered: 2009-04-24
Posts: 11

my apologies for a serious mistake in the code (project: Primer2BasicTest 1.0)

Please update the clock settings(for 72 Mhz operation) as follows:

After the unzipping the folder, change the following line between {... xxx ...} in Primer2BasicTest\Libraries\CMSIS\Core\CM3\system_stm32f10x.c (Note: This is readonly file)

static void SetSysClockTo72(void) {
...
/*!< PLLCLK = 8MHz * 9 = 72 MHz */
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL9);
...
}

To

static void SetSysClockTo72(void) {
...
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL6); /*!< PLLCLK = 12MHz * 6 = 72 MHz */
...
}

ST examples uses a 8Mhz clock whereas Primer2 uses 12Mhz.

I found this issue when I was playing with the USB examples.

Last edited by satishgn (2009-08-13 18:18:50)

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