STM CircleOS forum / Object file from other compiler...

repzak · 2009-04-19 15:58:35

Hello,

I have some nast asm codes there has been compiled in Keil for STM32, can i take the .o file from keil and add to Ride7, and link in instead the source file?

I think it is written in armasm and GNU will not directly support that.
I get a lot of crazy errors

Kasper

repzak · 2009-04-19 21:09:33

hmm, Seems not to be the case...

I just write some of my errors, hope someone easily can help me solve this, i am not so good in asm..

Here is the long list..

:38: Error: lo register required -- `stmfd r13!,r4-r11,r14'
:42: Error: only lo regs allowed with immediate -- `mov r8,#0x2000000'
:44: Error: only lo regs allowed with immediate -- `mov r9,#0'
:45: Error: lo register required -- `ldr r12,[r2],#4'
:46: Error: lo register required -- `ldr r14,[r2],#4'
:56: Error: lo register required -- `ldr r12,[r2],#4'
:57: Error: lo register required -- `ldr r14,[r2],#4'
:67: Error: lo register required -- `ldr r12,[r2],#4'
:68: Error: lo register required -- `ldr r14,[r2],#4'
:78: Error: lo register required -- `ldr r12,[r2],#4'
:79: Error: lo register required -- `ldr r14,[r2],#4'
:89: Error: lo register required -- `ldr r12,[r2],#4'
:90: Error: lo register required -- `ldr r14,[r2],#4'
:100: Error: lo register required -- `ldr r12,[r2],#4'
:101: Error: lo register required -- `ldr r14,[r2],#4'
:111: Error: lo register required -- `ldr r12,[r2],#4'
:112: Error: lo register required -- `ldr r14,[r2],#4'
:122: Error: lo register required -- `ldr r12,[r2],#4'
:123: Error: lo register required -- `ldr r14,[r2],#4'
:134: Error: only lo regs allowed with immediate -- `mov r14,#0x7f00'
:135: Error: unshifted register required -- `orr r14,r14,#0xff'
:137: Error: unshifted register required -- `orr r4,r4,r5,LSL#6'
:140: Error: Thumb does not support conditional execution
:142: Error: unshifted register required -- `orr r8,r8,r9,LSL#6'
:145: Error: Thumb does not support conditional execution
:147: Error: lo register required -- `strh r8,[r0,#2]'
:151: Error: only lo regs allowed with immediate -- `mov r8,#0x2000000'
:153: Error: only lo regs allowed with immediate -- `mov r9,#0'
:154: Error: lo register required -- `ldr r12,[r2],#4'
:159: Error: lo register required -- `ldr r12,[r2],#4'
:164: Error: lo register required -- `ldr r12,[r2],#4'
:169: Error: lo register required -- `ldr r12,[r2],#4'
:174: Error: lo register required -- `ldr r12,[r2],#4'
:179: Error: lo register required -- `ldr r12,[r2],#4'
:184: Error: lo register required -- `ldr r12,[r2],#4'
:189: Error: lo register required -- `ldr r12,[r2],#4'
:195: Error: only lo regs allowed with immediate -- `mov r14,#0x7f00'
:196: Error: unshifted register required -- `orr r14,r14,#0xff'
:198: Error: unshifted register required -- `orr r4,r4,r5,LSL#6'
:201: Error: Thumb does not support conditional execution
:203: Error: unshifted register required -- `orr r8,r8,r9,LSL#6'
:206: Error: Thumb does not support conditional execution
:208: Error: lo register required -- `strh r8,[r0,#0x42]'
:211: Error: only lo regs allowed with immediate -- `mov r12,#0xf'
:214: Error: lo register required -- `str r12,[r13,#0]'
:217: Error: only lo regs allowed with immediate -- `mov r8,#0x2000000'
:219: Error: only lo regs allowed with immediate -- `mov r10,#0x2000000'
:221: Error: only lo regs allowed with immediate -- `mov r9,#0'
:223: Error: only lo regs allowed with immediate -- `mov r11,#0'
:224: Error: lo register required -- `ldr r12,[r2],#4'
:225: Error: lo register required -- `ldr r14,[r2],#4'
:240: Error: lo register required -- `ldr r12,[r2],#4'
:241: Error: lo register required -- `ldr r14,[r2],#4'
:256: Error: lo register required -- `ldr r12,[r2],#4'
:257: Error: lo register required -- `ldr r14,[r2],#4'
:272: Error: lo register required -- `ldr r12,[r2],#4'
:273: Error: lo register required -- `ldr r14,[r2],#4'
:288: Error: lo register required -- `ldr r12,[r2],#4'
:289: Error: lo register required -- `ldr r14,[r2],#4'
:304: Error: lo register required -- `ldr r12,[r2],#4'
:305: Error: lo register required -- `ldr r14,[r2],#4'
:320: Error: lo register required -- `ldr r12,[r2],#4'
:321: Error: lo register required -- `ldr r14,[r2],#4'
:336: Error: lo register required -- `ldr r12,[r2],#4'
:337: Error: lo register required -- `ldr r14,[r2],#4'
:354: Error: only lo regs allowed with immediate -- `mov r14,#0x7f00'
:355: Error: unshifted register required -- `orr r14,r14,#0xff'
:357: Error: unshifted register required -- `orr r4,r4,r5,LSL#6'
:360: Error: Thumb does not support conditional execution
:362: Error: unshifted register required -- `orr r8,r8,r9,LSL#6'
:365: Error: Thumb does not support conditional execution
:367: Error: unshifted register required -- `orr r6,r6,r7,LSL#6'
:370: Error: Thumb does not support conditional execution
:372: Error: unshifted register required -- `orr r10,r10,r11,LSL#6'
:375: Error: Thumb does not support conditional execution
:376: Error: lo register required -- `ldr r12,[r13,#0]'
:377: Error: unshifted register required -- `add r14,r0,r12,LSL#3'
:378: Error: Thumb does not support this addressing mode -- `strh r6,[r14],#2'
:379: Error: lo register required -- `strh r10,[r14],#2'
:380: Error: Thumb does not support this addressing mode -- `strh r4,[r0],#2'
:381: Error: lo register required -- `strh r8,[r0],#2'
:382: Error: instruction not supported in Thumb16 mode -- `subs r12,r12,#1'
:385: Error: lo register required -- `ldmfd r13!,r4-r11,pc'
:389: Error: lo register required -- `stmfd r13!,r4-r11,r14'
:394: Error: lo register required -- `ldr r12,[r2],#4'
:395: Error: lo register required -- `ldr r14,[r2],#4'
:401: Error: lo register required -- `ldr r12,[r2],#4'
:402: Error: lo register required -- `ldr r14,[r2],#4'
:408: Error: lo register required -- `ldr r12,[r2],#4'
:409: Error: lo register required -- `ldr r14,[r2],#4'
:415: Error: lo register required -- `ldr r12,[r2],#4'
:416: Error: lo register required -- `ldr r14,[r2],#4'
:422: Error: lo register required -- `ldr r12,[r2],#4'
:423: Error: lo register required -- `ldr r14,[r2],#4'
:429: Error: lo register required -- `ldr r12,[r2],#4'
:430: Error: lo register required -- `ldr r14,[r2],#4'
:436: Error: lo register required -- `ldr r12,[r2],#4'
:437: Error: lo register required -- `ldr r14,[r2],#4'
:443: Error: lo register required -- `ldr r12,[r2],#4'
:444: Error: lo register required -- `ldr r14,[r2],#4'
:451: Error: only lo regs allowed with immediate -- `mov r14,#0x7f00'
:452: Error: unshifted register required -- `orr r14,r14,#0xff'
:454: Error: unshifted register required -- `orr r4,r4,r5,LSL#6'
:457: Error: Thumb does not support conditional execution
:463: Error: lo register required -- `ldr r12,[r2],#4'
:466: Error: lo register required -- `ldr r12,[r2],#4'
:469: Error: lo register required -- `ldr r12,[r2],#4'
:472: Error: lo register required -- `ldr r12,[r2],#4'
:475: Error: lo register required -- `ldr r12,[r2],#4'
:478: Error: lo register required -- `ldr r12,[r2],#4'
:481: Error: lo register required -- `ldr r12,[r2],#4'
:484: Error: lo register required -- `ldr r12,[r2],#4'
:488: Error: only lo regs allowed with immediate -- `mov r14,#0x7f00'
:489: Error: unshifted register required -- `orr r14,r14,#0xff'
:491: Error: unshifted register required -- `orr r4,r4,r5,LSL#6'
:494: Error: Thumb does not support conditional execution
:498: Error: only lo regs allowed with immediate -- `mov r12,#0xf'
:501: Error: lo register required -- `str r12,[r13,#0]'
:507: Error: lo register required -- `ldr r12,[r2],#4'
:508: Error: lo register required -- `ldr r14,[r2],#4'
:516: Error: lo register required -- `ldr r12,[r2],#4'
:517: Error: lo register required -- `ldr r14,[r2],#4'
:525: Error: lo register required -- `ldr r12,[r2],#4'
:526: Error: lo register required -- `ldr r14,[r2],#4'
:534: Error: lo register required -- `ldr r12,[r2],#4'
:535: Error: lo register required -- `ldr r14,[r2],#4'
:543: Error: lo register required -- `ldr r12,[r2],#4'
:544: Error: lo register required -- `ldr r14,[r2],#4'
:552: Error: lo register required -- `ldr r12,[r2],#4'
:553: Error: lo register required -- `ldr r14,[r2],#4'
:561: Error: lo register required -- `ldr r12,[r2],#4'
:562: Error: lo register required -- `ldr r14,[r2],#4'
:570: Error: lo register required -- `ldr r12,[r2],#4'
:571: Error: lo register required -- `ldr r14,[r2],#4'
:581: Error: only lo regs allowed with immediate -- `mov r14,#0x7f00'
:582: Error: unshifted register required -- `orr r14,r14,#0xff'
:584: Error: unshifted register required -- `orr r4,r4,r5,LSL#6'
:587: Error: Thumb does not support conditional execution
:589: Error: unshifted register required -- `orr r6,r6,r7,LSL#6'
:592: Error: Thumb does not support conditional execution
:593: Error: lo register required -- `ldr r12,[r13,#0]'
:594: Error: unshifted register required -- `add r14,r0,r12,LSL#2'
:595: Error: Thumb does not support this addressing mode -- `strh r6,[r14],#2'
:596: Error: Thumb does not support this addressing mode -- `strh r4,[r0],#2'
:597: Error: instruction not supported in Thumb16 mode -- `subs r12,r12,#1'
:600: Error: lo register required -- `ldmfd r13!,r4-r11,pc'

Last edited by repzak (2009-04-19 21:09:50)

domen · 2009-04-20 07:58:41

repzak :
I have some nast asm codes there has been compiled in Keil for STM32, can i take the .o file from keil and add to Ride7, and link in instead the source file?

I guess it should work if both compilers use the same ABI.

Include the source (and your compile options), so one can actually play with it on gcc/gas? I found it not hard to "port" between various assemblers.

repzak · 2009-04-20 09:48:29

Hello,

I will paste the code.

I hope i can keep this project secret until the release time, so i have removed some info in the top of hte file, license etc.
When it is working i will post it here as project, don't worry
The licence text will be attached in the release ofcause!!

I have not made any compiler settings, what must i do ????

The author has put 2 different asm files for ARM with the lib, so here they go:

first a GCC variant:

Code:

 

    .GLOBAL xyyx_PolyphaseStereo
xyyx_PolyphaseStereo:
    STMFD    r13!,{r4-r11,r14}
    SUB      r13,r13,#8
    STR      r0,[r13,#4]
    MOV      r4,#0x2000000
    MOV      r8,#0x2000000
    MOV      r5,#0
    MOV      r9,#0
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0]
    LDR      r3,[r1,#0x5c]
    SMLAL    r4,r5,r0,r12
    LDR      r0,[r1,#0x80]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xdc]
    SMLAL    r8,r9,r0,r12
    SMLAL    r8,r9,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#4]
    LDR      r3,[r1,#0x58]
    SMLAL    r4,r5,r0,r12
    LDR      r0,[r1,#0x84]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xd8]
    SMLAL    r8,r9,r0,r12
    SMLAL    r8,r9,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#8]
    LDR      r3,[r1,#0x54]
    SMLAL    r4,r5,r0,r12
    LDR      r0,[r1,#0x88]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xd4]
    SMLAL    r8,r9,r0,r12
    SMLAL    r8,r9,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0xc]
    LDR      r3,[r1,#0x50]
    SMLAL    r4,r5,r0,r12
    LDR      r0,[r1,#0x8c]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xd0]
    SMLAL    r8,r9,r0,r12
    SMLAL    r8,r9,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x10]
    LDR      r3,[r1,#0x4c]
    SMLAL    r4,r5,r0,r12
    LDR      r0,[r1,#0x90]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xcc]
    SMLAL    r8,r9,r0,r12
    SMLAL    r8,r9,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x14]
    LDR      r3,[r1,#0x48]
    SMLAL    r4,r5,r0,r12
    LDR      r0,[r1,#0x94]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xc8]
    SMLAL    r8,r9,r0,r12
    SMLAL    r8,r9,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x18]
    LDR      r3,[r1,#0x44]
    SMLAL    r4,r5,r0,r12
    LDR      r0,[r1,#0x98]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xc4]
    SMLAL    r8,r9,r0,r12
    SMLAL    r8,r9,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x1c]
    LDR      r3,[r1,#0x40]
    SMLAL    r4,r5,r0,r12
    LDR      r0,[r1,#0x9c]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xc0]
    SMLAL    r8,r9,r0,r12
    SMLAL    r8,r9,r3,r14
    LDR      r0,[r13,#4]
    MOV      r14,#0x7f00
    ORR      r14,r14,#0xff
    MOV      r4,r4,LSR #26
    ORR      r4,r4,r5,LSL #6
    MOV      r12,r4,ASR #31
    CMP      r12,r4,ASR #15
    EORNE    r4,r12,r14
    MOV      r8,r8,LSR #26
    ORR      r8,r8,r9,LSL #6
    MOV      r12,r8,ASR #31
    CMP      r12,r8,ASR #15
    EORNE    r8,r12,r14
    STRH     r4,[r0,#0]
    STRH     r8,[r0,#2]
    ADD      r2,r2,#0x3c0
    ADD      r1,r1,#0x1000
    MOV      r4,#0x2000000
    MOV      r8,#0x2000000
    MOV      r5,#0
    MOV      r9,#0
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0]
    LDR      r3,[r1,#0x80]
    SMLAL    r4,r5,r0,r12
    SMLAL    r8,r9,r3,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#4]
    LDR      r3,[r1,#0x84]
    SMLAL    r4,r5,r0,r12
    SMLAL    r8,r9,r3,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#8]
    LDR      r3,[r1,#0x88]
    SMLAL    r4,r5,r0,r12
    SMLAL    r8,r9,r3,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0xc]
    LDR      r3,[r1,#0x8c]
    SMLAL    r4,r5,r0,r12
    SMLAL    r8,r9,r3,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0x10]
    LDR      r3,[r1,#0x90]
    SMLAL    r4,r5,r0,r12
    SMLAL    r8,r9,r3,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0x14]
    LDR      r3,[r1,#0x94]
    SMLAL    r4,r5,r0,r12
    SMLAL    r8,r9,r3,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0x18]
    LDR      r3,[r1,#0x98]
    SMLAL    r4,r5,r0,r12
    SMLAL    r8,r9,r3,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0x1c]
    LDR      r3,[r1,#0x9c]
    SMLAL    r4,r5,r0,r12
    SMLAL    r8,r9,r3,r12
    LDR      r0,[r13,#4]
    MOV      r14,#0x7f00
    ORR      r14,r14,#0xff
    MOV      r4,r4,LSR #26
    ORR      r4,r4,r5,LSL #6
    MOV      r12,r4,ASR #31
    CMP      r12,r4,ASR #15
    EORNE    r4,r12,r14
    MOV      r8,r8,LSR #26
    ORR      r8,r8,r9,LSL #6
    MOV      r12,r8,ASR #31
    CMP      r12,r8,ASR #15
    EORNE    r8,r12,r14
    STRH     r4,[r0,#0x40]
    STRH     r8,[r0,#0x42]
    SUB      r2,r2,#0x3e0
    SUB      r1,r1,#0xf00
    MOV      r12,#0xf
    ADD      r0,r0,#4
LoopPS:
    STR      r12,[r13,#0]
    STR      r0,[r13,#4]
    MOV      r4,#0x2000000
    MOV      r8,#0x2000000
    MOV      r6,#0x2000000
    MOV      r10,#0x2000000
    MOV      r5,#0
    MOV      r9,#0
    MOV      r7,#0
    MOV      r11,#0
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0]
    LDR      r3,[r1,#0x5c]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r6,r7,r3,r12
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xdc]
    LDR      r0,[r1,#0x80]
    SMLAL    r8,r9,r3,r14
    SMLAL    r10,r11,r3,r12
    RSB      r14,r14,#0
    SMLAL    r8,r9,r0,r12
    SMLAL    r10,r11,r0,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#4]
    LDR      r3,[r1,#0x58]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r6,r7,r3,r12
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xd8]
    LDR      r0,[r1,#0x84]
    SMLAL    r8,r9,r3,r14
    SMLAL    r10,r11,r3,r12
    RSB      r14,r14,#0
    SMLAL    r8,r9,r0,r12
    SMLAL    r10,r11,r0,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#8]
    LDR      r3,[r1,#0x54]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r6,r7,r3,r12
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xd4]
    LDR      r0,[r1,#0x88]
    SMLAL    r8,r9,r3,r14
    SMLAL    r10,r11,r3,r12
    RSB      r14,r14,#0
    SMLAL    r8,r9,r0,r12
    SMLAL    r10,r11,r0,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0xc]
    LDR      r3,[r1,#0x50]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r6,r7,r3,r12
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xd0]
    LDR      r0,[r1,#0x8c]
    SMLAL    r8,r9,r3,r14
    SMLAL    r10,r11,r3,r12
    RSB      r14,r14,#0
    SMLAL    r8,r9,r0,r12
    SMLAL    r10,r11,r0,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x10]
    LDR      r3,[r1,#0x4c]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r6,r7,r3,r12
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xcc]
    LDR      r0,[r1,#0x90]
    SMLAL    r8,r9,r3,r14
    SMLAL    r10,r11,r3,r12
    RSB      r14,r14,#0
    SMLAL    r8,r9,r0,r12
    SMLAL    r10,r11,r0,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x14]
    LDR      r3,[r1,#0x48]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r6,r7,r3,r12
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xc8]
    LDR      r0,[r1,#0x94]
    SMLAL    r8,r9,r3,r14
    SMLAL    r10,r11,r3,r12
    RSB      r14,r14,#0
    SMLAL    r8,r9,r0,r12
    SMLAL    r10,r11,r0,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x18]
    LDR      r3,[r1,#0x44]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r6,r7,r3,r12
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xc4]
    LDR      r0,[r1,#0x98]
    SMLAL    r8,r9,r3,r14
    SMLAL    r10,r11,r3,r12
    RSB      r14,r14,#0
    SMLAL    r8,r9,r0,r12
    SMLAL    r10,r11,r0,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x1c]
    LDR      r3,[r1,#0x40]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r6,r7,r3,r12
    SMLAL    r4,r5,r3,r14
    LDR      r3,[r1,#0xc0]
    LDR      r0,[r1,#0x9c]
    SMLAL    r8,r9,r3,r14
    SMLAL    r10,r11,r3,r12
    RSB      r14,r14,#0
    SMLAL    r8,r9,r0,r12
    SMLAL    r10,r11,r0,r14
    ADD      r1,r1,#0x100
    LDR      r0,[r13,#4]
    MOV      r14,#0x7f00
    ORR      r14,r14,#0xff
    MOV      r4,r4,LSR #26
    ORR      r4,r4,r5,LSL #6
    MOV      r12,r4,ASR #31
    CMP      r12,r4,ASR #15
    EORNE    r4,r12,r14
    MOV      r8,r8,LSR #26
    ORR      r8,r8,r9,LSL #6
    MOV      r12,r8,ASR #31
    CMP      r12,r8,ASR #15
    EORNE    r8,r12,r14
    MOV      r6,r6,LSR #26
    ORR      r6,r6,r7,LSL #6
    MOV      r12,r6,ASR #31
    CMP      r12,r6,ASR #15
    EORNE    r6,r12,r14
    MOV      r10,r10,LSR #26
    ORR      r10,r10,r11,LSL #6
    MOV      r12,r10,ASR #31
    CMP      r12,r10,ASR #15
    EORNE    r10,r12,r14
    LDR      r12,[r13,#0]
    ADD      r14,r0,r12,LSL #3
    STRH     r6,[r14],#2
    STRH     r10,[r14],#2
    STRH     r4,[r0],#2
    STRH     r8,[r0],#2
    SUBS     r12,r12,#1
    BNE      LoopPS
    ADD      r13,r13,#8
    LDMFD    r13!,{r4-r11,pc}

    .GLOBAL xyyx_PolyphaseMono
xyyx_PolyphaseMono:
    STMFD    r13!,{r4-r11,r14}
    SUB      r13,r13,#8
    STR      r0,[r13,#4]
    MOV      r4,#0x2000000
    MOV      r5,#0
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0]
    LDR      r3,[r1,#0x5c]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r0,r12
    SMLAL    r4,r5,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#4]
    LDR      r3,[r1,#0x58]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r0,r12
    SMLAL    r4,r5,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#8]
    LDR      r3,[r1,#0x54]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r0,r12
    SMLAL    r4,r5,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0xc]
    LDR      r3,[r1,#0x50]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r0,r12
    SMLAL    r4,r5,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x10]
    LDR      r3,[r1,#0x4c]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r0,r12
    SMLAL    r4,r5,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x14]
    LDR      r3,[r1,#0x48]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r0,r12
    SMLAL    r4,r5,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x18]
    LDR      r3,[r1,#0x44]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r0,r12
    SMLAL    r4,r5,r3,r14
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x1c]
    LDR      r3,[r1,#0x40]
    RSB      r14,r14,#0
    SMLAL    r4,r5,r0,r12
    SMLAL    r4,r5,r3,r14
    LDR      r0,[r13,#4]
    MOV      r14,#0x7f00
    ORR      r14,r14,#0xff
    MOV      r4,r4,LSR #26
    ORR      r4,r4,r5,LSL #6
    MOV      r12,r4,ASR #31
    CMP      r12,r4,ASR #15
    EORNE    r4,r12,r14
    STRH     r4,[r0,#0]
    ADD      r2,r2,#0x3c0
    ADD      r1,r1,#0x1000
    MOV      r4,#0x2000000
    MOV      r5,#0
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0]
    SMLAL    r4,r5,r0,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#4]
    SMLAL    r4,r5,r0,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#8]
    SMLAL    r4,r5,r0,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0xc]
    SMLAL    r4,r5,r0,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0x10]
    SMLAL    r4,r5,r0,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0x14]
    SMLAL    r4,r5,r0,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0x18]
    SMLAL    r4,r5,r0,r12
    LDR      r12,[r2],#4
    LDR      r0,[r1,#0x1c]
    SMLAL    r4,r5,r0,r12
    LDR      r0,[r13,#4]
    MOV      r14,#0x7f00
    ORR      r14,r14,#0xff
    MOV      r4,r4,LSR #26
    ORR      r4,r4,r5,LSL #6
    MOV      r12,r4,ASR #31
    CMP      r12,r4,ASR #15
    EORNE    r4,r12,r14
    STRH     r4,[r0,#0x20]
    SUB      r2,r2,#0x3e0
    SUB      r1,r1,#0xf00
    MOV      r12,#0xf
    ADD      r0,r0,#2
LoopPM:
    STR      r12,[r13,#0]
    STR      r0,[r13,#4]
    MOV      r4,#0x2000000
    MOV      r6,#0x2000000
    MOV      r5,#0
    MOV      r7,#0
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0]
    LDR      r3,[r1,#0x5c]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    SMLAL    r6,r7,r3,r12
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#4]
    LDR      r3,[r1,#0x58]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    SMLAL    r6,r7,r3,r12
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#8]
    LDR      r3,[r1,#0x54]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    SMLAL    r6,r7,r3,r12
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0xc]
    LDR      r3,[r1,#0x50]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    SMLAL    r6,r7,r3,r12
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x10]
    LDR      r3,[r1,#0x4c]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    SMLAL    r6,r7,r3,r12
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x14]
    LDR      r3,[r1,#0x48]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    SMLAL    r6,r7,r3,r12
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x18]
    LDR      r3,[r1,#0x44]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    SMLAL    r6,r7,r3,r12
    LDR      r12,[r2],#4
    LDR      r14,[r2],#4
    LDR      r0,[r1,#0x1c]
    LDR      r3,[r1,#0x40]
    SMLAL    r4,r5,r0,r12
    SMLAL    r6,r7,r0,r14
    RSB      r14,r14,#0
    SMLAL    r4,r5,r3,r14
    SMLAL    r6,r7,r3,r12
    ADD      r1,r1,#0x100
    LDR      r0,[r13,#4]
    MOV      r14,#0x7f00
    ORR      r14,r14,#0xff
    MOV      r4,r4,LSR #26
    ORR      r4,r4,r5,LSL #6
    MOV      r12,r4,ASR #31
    CMP      r12,r4,ASR #15
    EORNE    r4,r12,r14
    MOV      r6,r6,LSR #26
    ORR      r6,r6,r7,LSL #6
    MOV      r12,r6,ASR #31
    CMP      r12,r6,ASR #15
    EORNE    r6,r12,r14
    LDR      r12,[r13,#0]
    ADD      r14,r0,r12,LSL #2
    STRH     r6,[r14],#2
    STRH     r4,[r0],#2
    SUBS     r12,r12,#1
    BNE      LoopPM
    ADD      r13,r13,#8
    LDMFD    r13!,{r4-r11,pc}

    .END

Second file:

Code:

     AREA    |.text|, CODE, READONLY

PCM        RN    r0
VB1        RN    r1
COEF    RN     r2

VLO        RN    r0        ; must push PCM ptr to stack during inner looop
VHI        RN    r3        ; temp variable

SUM1LL    RN     r4
SUM1LH    RN    r5
SUM2LL    RN     r6
SUM2LH    RN    r7
SUM1RL    RN     r8
SUM1RH    RN    r9
SUM2RL    RN     r10
SUM2RH    RN    r11

CF1        RN    r12
CF2        RN     r14        

SIGN    RN  r12        ; used for clipping - after discarding CF1
MAXPOS  RN  r14        ; used for clipping - after discarding CF2

I        RN    r12        ; overlay loop counter with CF1, SIGN

        GBLA    RNDVAL
RNDVAL    SETA    (1 << ((32 - 12) + (6 - 1)))

    ; C64TOS - clip 64-bit accumulator to short (no rounding)
    ;   xl, xh = value (lo 32, hi 32)
    ;   input assumed to have 6 fraction bits
    ;   sign = temp variable to use for sign
    ;   maxPos = 0x00007fff (takes 2 instr. to generate - calculating
    ;              once and using repeatedly saves if you do several CTOS in a row)
    MACRO    
    C64TOS    $xl, $xh, $sign, $maxPos

    mov        $xl, $xl, lsr #(20+6)
    orr        $xl, $xl, $xh, lsl #(12-6)
    mov        $sign, $xl, ASR #31
    cmp        $sign, $xl, ASR #15
    eorne    $xl, $sign, $maxPos
    
    MEND    ; C64TOS

    ; MC0S - process 2 taps, 1 sample per channel (sample 0)
    ;   x = vb1 offset
    MACRO    
    MC0S    $x

    ldr        CF1, [COEF], #4
    ldr        CF2, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    ldr        VHI, [VB1, #(4*(23 - $x))]

    smlal    SUM1LL, SUM1LH, VLO, CF1
    ldr        VLO, [VB1, #(4*(32 + $x))]
    rsb        CF2, CF2, #0
    smlal    SUM1LL, SUM1LH, VHI, CF2
    ldr        VHI, [VB1, #(4*(32 + 23 - $x))]
    
    smlal    SUM1RL, SUM1RH, VLO, CF1
    smlal    SUM1RL, SUM1RH, VHI, CF2

    MEND    ; MC0S

    ; MC1S - process 2 taps, 1 sample per channel (sample 16)
    ;   x = vb1 offset
    MACRO    
    MC1S    $x

    ldr        CF1, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    ldr        VHI, [VB1, #(4*(32 + $x))]
    smlal    SUM1LL, SUM1LH, VLO, CF1
    smlal    SUM1RL, SUM1RH, VHI, CF1
    
    MEND    ; MC1S

    ; MC2S - process 2 taps, 2 samples per channel
    ;   x = vb1 offset
    MACRO    
    MC2S    $x

    ; load data as far as possible in advance of using it
    ldr        CF1, [COEF], #4
    ldr        CF2, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    ldr        VHI, [VB1, #(4*(23 - $x))]

    smlal    SUM1LL, SUM1LH, VLO, CF1
    smlal    SUM2LL, SUM2LH, VLO, CF2
    rsb        CF2, CF2, #0
    smlal    SUM2LL, SUM2LH, VHI, CF1
    smlal    SUM1LL, SUM1LH, VHI, CF2

    ldr        VHI, [VB1, #(4*(32 + 23 - $x))]
    ldr        VLO, [VB1, #(4*(32 + $x))]

    smlal    SUM1RL, SUM1RH, VHI, CF2
    smlal    SUM2RL, SUM2RH, VHI, CF1
    rsb        CF2, CF2, #0
    smlal    SUM1RL, SUM1RH, VLO, CF1
    smlal    SUM2RL, SUM2RH, VLO, CF2

    MEND    ; MC2S

; void PolyphaseStereo(short *pcm, int *vbuf, const int *coefBase)

xyyx_PolyphaseStereo    FUNCTION
    EXPORT    xyyx_PolyphaseStereo

    stmfd    sp!, {r4-r11, r14}
    
    ; clear out stack space for 2 local variables (4 bytes each)
    sub        sp, sp, #8
    str        PCM, [sp, #4]                ; sp[1] = pcm pointer

    ; special case, output sample 0
    mov        SUM1LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1RL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1LH, #0
    mov        SUM1RH, #0

    MC0S    0
    MC0S    1
    MC0S    2
    MC0S    3
    MC0S    4
    MC0S    5
    MC0S    6
    MC0S    7

    ldr        PCM, [sp, #4]        ; load pcm pointer
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS
    C64TOS    SUM1RL, SUM1RH, SIGN, MAXPOS

    strh    SUM1LL, [PCM, #(2*0)]
    strh    SUM1RL, [PCM, #(2*1)]

    ; special case, output sample 16
    add        COEF, COEF, #(4*(256-16))    ; coef = coefBase + 256 (was coefBase + 16 after MC0S block)
    add        VB1, VB1, #(4*1024)            ; vb1 = vbuf + 64*16
    
    mov        SUM1LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1RL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1LH, #0
    mov        SUM1RH, #0

    MC1S    0
    MC1S    1
    MC1S    2
    MC1S    3
    MC1S    4
    MC1S    5
    MC1S    6
    MC1S    7

    ldr        PCM, [sp, #4]        ; load pcm pointer
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS
    C64TOS    SUM1RL, SUM1RH, SIGN, MAXPOS

    strh    SUM1LL, [PCM, #(2*(2*16+0))]
    strh    SUM1RL, [PCM, #(2*(2*16+1))]

    ; main convolution loop: sum1L = samples 1, 2, 3, ... 15   sum2L = samples 31, 30, ... 17
    sub        COEF, COEF, #(4*(264-16))    ; coef = coefBase + 16 (was coefBase + 264 after MC1S block)
    sub        VB1, VB1, #(4*(1024-64))    ; vb1 = vbuf + 64 (was vbuf + 64*16 after MC1S block)
    mov        I, #15                        ; loop counter, count down
    add        PCM, PCM, #(2*2)            ; pcm+=2
    
LoopPS
    str        I, [sp, #0]                    ; sp[0] = i (loop counter)
    str        PCM, [sp, #4]                ; sp[1] = pcm (pointer to pcm buffer)
    
    mov        SUM1LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1RL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM2LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM2RL, #RNDVAL                ; load rndVal (low 32)
    
    mov        SUM1LH, #0
    mov        SUM1RH, #0
    mov        SUM2LH, #0
    mov        SUM2RH, #0

    MC2S    0
    MC2S    1
    MC2S    2
    MC2S    3
    MC2S    4
    MC2S    5
    MC2S    6
    MC2S    7
    
    add        VB1, VB1, #(4*64)    ; vb1 += 64
    
    ldr        PCM, [sp, #4]        ; load pcm pointer
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS
    C64TOS    SUM1RL, SUM1RH, SIGN, MAXPOS
    C64TOS    SUM2LL, SUM2LH, SIGN, MAXPOS
    C64TOS    SUM2RL, SUM2RH, SIGN, MAXPOS
    
    ldr        I, [sp, #0]            ; load loop counter
    add        CF2, PCM, I, lsl #3    ; CF2 = PCM + 4*i (short offset)
    strh    SUM2LL, [CF2], #2    ; *(pcm + 2*2*i + 0)
    strh    SUM2RL, [CF2], #2    ; *(pcm + 2*2*i + 1)

    strh    SUM1LL, [PCM], #2    ; *(pcm + 0)
    strh    SUM1RL, [PCM], #2    ; *(pcm + 1)
    
    subs    I, I, #1
    bne        LoopPS

    ; restore stack pointer
    add        sp, sp, #8

    ldmfd    sp!, {r4-r11, pc}
    ENDFUNC

;; MONO PROCESSING

    ; MC0M - process 2 taps, 1 sample (sample 0)
    ;   x = vb1 offset
    MACRO    
    MC0M    $x

    ldr        CF1, [COEF], #4
    ldr        CF2, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    ldr        VHI, [VB1, #(4*(23 - $x))]

    rsb        CF2, CF2, #0
    smlal    SUM1LL, SUM1LH, VLO, CF1
    smlal    SUM1LL, SUM1LH, VHI, CF2

    MEND    ; MC0M

    ; MC1M - process 2 taps, 1 sample (sample 16)
    ;   x = vb1 offset
    MACRO    
    MC1M    $x

    ldr        CF1, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    smlal    SUM1LL, SUM1LH, VLO, CF1
    
    MEND    ; MC1M

    ; MC2M - process 2 taps, 2 samples
    ;   x = vb1 offset
    MACRO    
    MC2M    $x

    ; load data as far as possible in advance of using it
    ldr        CF1, [COEF], #4
    ldr        CF2, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    ldr        VHI, [VB1, #(4*(23 - $x))]

    smlal    SUM1LL, SUM1LH, VLO, CF1
    smlal    SUM2LL, SUM2LH, VLO, CF2
    rsb        CF2, CF2, #0
    smlal    SUM1LL, SUM1LH, VHI, CF2
    smlal    SUM2LL, SUM2LH, VHI, CF1

    MEND    ; MC2M

; void PolyphaseMono(short *pcm, int *vbuf, const int *coefBase)

xyyx_PolyphaseMono    FUNCTION
    EXPORT    xyyx_PolyphaseMono

    stmfd    sp!, {r4-r11, r14}
    
    ; clear out stack space for 4 local variables (4 bytes each)
    sub        sp, sp, #8
    str        PCM, [sp, #4]            ; sp[1] = pcm pointer

    ; special case, output sample 0
    mov        SUM1LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1LH, #0

    MC0M    0
    MC0M    1
    MC0M    2
    MC0M    3
    MC0M    4
    MC0M    5
    MC0M    6
    MC0M    7

    ldr        PCM, [sp, #4]        ; load pcm pointer
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS
    strh    SUM1LL, [PCM, #(2*0)]

    ; special case, output sample 16
    add        COEF, COEF, #(4*(256-16))    ; coef = coefBase + 256 (was coefBase + 16 after MC0M block)
    add        VB1, VB1, #(4*1024)            ; vb1 = vbuf + 64*16
    
    mov        SUM1LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1LH, #0

    MC1M    0
    MC1M    1
    MC1M    2
    MC1M    3
    MC1M    4
    MC1M    5
    MC1M    6
    MC1M    7

    ldr        PCM, [sp, #4]        ; load pcm pointer
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS

    strh    SUM1LL, [PCM, #(2*16)]

    ; main convolution loop: sum1L = samples 1, 2, 3, ... 15   sum2L = samples 31, 30, ... 17
    sub        COEF, COEF, #(4*(264-16))    ; coef = coefBase + 16 (was coefBase + 264 after MC1M block)
    sub        VB1, VB1, #(4*(1024-64))    ; vb1 = vbuf + 64 (was vbuf + 64*16 after MC1M block)
    mov        I, #15                        ; loop counter, count down
    add        PCM, PCM, #(2)                ; pcm++
    
LoopPM
    str        I, [sp, #0]                    ; sp[0] = i (loop counter)
    str        PCM, [sp, #4]                ; sp[1] = pcm (pointer to pcm buffer)
    
    mov        SUM1LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM2LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1LH, #0
    mov        SUM2LH, #0

    MC2M    0
    MC2M    1
    MC2M    2
    MC2M    3
    MC2M    4
    MC2M    5
    MC2M    6
    MC2M    7
    
    add        VB1, VB1, #(4*64)    ; vb1 += 64
    
    ldr        PCM, [sp, #4]        ; load pcm pointer
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS
    C64TOS    SUM2LL, SUM2LH, SIGN, MAXPOS
    
    ldr        I, [sp, #0]            ; load loop counter
    add        CF2, PCM, I, lsl #2    ; CF2 = PCM + 2*i (short offset)
    strh    SUM2LL, [CF2], #2    ; *(pcm + 2*i + 0)
    strh    SUM1LL, [PCM], #2    ; *(pcm + 0) ; pcm++
    
    subs    I, I, #1
    bne        LoopPM

    ; restore stack pointer
    add        sp, sp, #8

    ldmfd    sp!, {r4-r11, pc}
    ENDFUNC

    END

Thank you very much

Kasper

Francis · 2009-04-20 10:15:59

It seems that there are many errors like:
"Thumb does not support ..."
Are you sure that the code is for thumb2 core ? (it looks like standard ARM instructions).

repzak · 2009-04-20 10:38:33

Hello,

It is properly for normal arm yes, but i have compiled the second file in Keil for STM32, and the code is working??

Wonder how that is possible?

The 2 files do the same, so only one need to work.

I am not an expert in this area

Kasper

Last edited by repzak (2009-04-20 20:30:17)

repzak · 2009-04-22 17:41:45

Hello,

Noone that can pudh me in the right/best direction to get this to work?

Can i use anything from the Keil compiler to genereate with ride?

Kasper

Francis · 2009-04-23 09:01:13

Kasper,

I started to translate your code (up to line 141), but the first error still means that it is not THUMB2 code (but standard ARM instructions)...

Code:

.cpu cortex-m3
.fpu softvfp   
.syntax unified 
.thumb
.text    

/*.equ  PCM ,  r0*/
PCM  .req    r0
VB1  .req    r1
COEF .req    r2

VLO  .req    r0       
VHI  .req    r3       

SUM1LL .req  r4
SUM1LH .req  r5
SUM2LL .req  r6
SUM2LH .req  r7
SUM1RL .req  r8
SUM1RH .req  r9
SUM2RL .req  r10
SUM2RH .req  r11

CF1    .req  r12
CF2    .req  r14        

SIGN   .req  r12 
MAXPOS .req  r14 

I      .req  r12    

.global         RNDVAL
/* RNDVAL    SETA    (1 << ((32 - 12) + (6 - 1))) */
.equ   RNDVAL,    0x02000000   /*(1 << (25))     */

    /*; C64TOS - clip 64-bit accumulator to short (no rounding)
    ;   xl, xh = value (lo 32, hi 32)
    ;   input assumed to have 6 fraction bits
    ;   sign = temp variable to use for sign
    ;   maxPos = 0x00007fff (takes 2 instr. to generate - calculating
    ;              once and using repeatedly saves if you do several CTOS in a row) */
    .macro   C64TOS    _xl, _xh, _sign, _maxPos

    mov        \_xl, \_xl, lsr #(20+6)
    orr        \_xl, \_xl, \_xh, lsl #(12-6)
    mov        \_sign, \_xl, ASR #31
    cmp        \_sign, \_xl, ASR #15
    eorne    \_xl, \_sign, \_maxPos
    
    .endm 

  /*  ; MC0S - process 2 taps, 1 sample per channel (sample 0)
    ;   x = vb1 offset */
    .MACRO        MC0S    $x

    ldr        CF1, [COEF], #4
    ldr        CF2, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    ldr        VHI, [VB1, #(4*(23 - $x))]

    smlal    SUM1LL, SUM1LH, VLO, CF1
    ldr        VLO, [VB1, #(4*(32 + $x))]
    rsb        CF2, CF2, #0
    smlal    SUM1LL, SUM1LH, VHI, CF2
    ldr        VHI, [VB1, #(4*(32 + 23 - $x))]
    
    smlal    SUM1RL, SUM1RH, VLO, CF1
    smlal    SUM1RL, SUM1RH, VHI, CF2

    .ENDM

/*    ; MC1S - process 2 taps, 1 sample per channel (sample 16)
    ;   x = vb1 offset */
    .MACRO         MC1S    $x

    ldr        CF1, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    ldr        VHI, [VB1, #(4*(32 + $x))]
    smlal    SUM1LL, SUM1LH, VLO, CF1
    smlal    SUM1RL, SUM1RH, VHI, CF1
    
    .ENDM

/*    ; MC2S - process 2 taps, 2 samples per channel
    ;   x = vb1 offset */
    .MACRO         MC2S    $x

    /* ; load data as far as possible in advance of using it */
    ldr        CF1, [COEF], #4
    ldr        CF2, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    ldr        VHI, [VB1, #(4*(23 - $x))]

    smlal    SUM1LL, SUM1LH, VLO, CF1
    smlal    SUM2LL, SUM2LH, VLO, CF2
    rsb        CF2, CF2, #0
    smlal    SUM2LL, SUM2LH, VHI, CF1
    smlal    SUM1LL, SUM1LH, VHI, CF2

    ldr        VHI, [VB1, #(4*(32 + 23 - $x))]
    ldr        VLO, [VB1, #(4*(32 + $x))]

    smlal    SUM1RL, SUM1RH, VHI, CF2
    smlal    SUM2RL, SUM2RH, VHI, CF1
    rsb        CF2, CF2, #0
    smlal    SUM1RL, SUM1RH, VLO, CF1
    smlal    SUM2RL, SUM2RH, VLO, CF2
    .ENDM


/* ; void PolyphaseStereo(short *pcm, int *vbuf, const int *coefBase) */

.thumb_func
    xyyx_PolyphaseStereo:

    stmfd    sp!, {r4-r11, r14}
    
/*    ; clear out stack space for 2 local variables (4 bytes each) */
    sub        sp, sp, #8
    str        PCM , [sp, #4]                /*; sp[1] = pcm pointer */

/*    ; special case, output sample 0 */
    mov        SUM1LL, #RNDVAL               /* ; load rndVal (low 32) */
    mov        SUM1RL, #RNDVAL               /* ; load rndVal (low 32) */
    mov        SUM1LH, #0
    mov        SUM1RH, #0

    MC0S    0
    MC0S    1
    MC0S    2
    MC0S    3
    MC0S    4
    MC0S    5
    MC0S    6
    MC0S    7

    ldr        PCM, [sp, #4]         /* ; load pcm pointer */
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS
    C64TOS    SUM1RL, SUM1RH, SIGN, MAXPOS

    strh    SUM1LL, [PCM, #(2*0)]
    strh    SUM1RL, [PCM, #(2*1)]

   /* ; special case, output sample 16 */
    add        COEF, COEF, #(4*(256-16))  /*   ; coef = coefBase + 256 (was coefBase + 16 after MC0S block) */
    add        VB1, VB1, #(4*1024)          /*   ; vb1 = vbuf + 64*16 */
    
    mov        SUM1LL, #RNDVAL                 /* ; load rndVal (low 32) */
    mov        SUM1RL, #RNDVAL                 /* ; load rndVal (low 32)  */
    mov        SUM1LH, #0
    mov        SUM1RH, #0

    MC1S    0
    MC1S    1
    MC1S    2
    MC1S    3
    MC1S    4
    MC1S    5
    MC1S    6
    MC1S    7

    ldr        PCM, [sp, #4]        ; load pcm pointer
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS
    C64TOS    SUM1RL, SUM1RH, SIGN, MAXPOS

    strh    SUM1LL, [PCM, #(2*(2*16+0))]
    strh    SUM1RL, [PCM, #(2*(2*16+1))]

    /*; main convolution loop: sum1L = samples 1, 2, 3, ... 15   sum2L = samples 31, 30, ... 17 */
    sub        COEF, COEF, #(4*(264-16))    /* ; coef = coefBase + 16 (was coefBase + 264 after MC1S block) */
    sub        VB1, VB1, #(4*(1024-64))     /* ; vb1 = vbuf + 64 (was vbuf + 64*16 after MC1S block) */
    mov        I, #15                       /* ; loop counter, count down */
    add        PCM, PCM, #(2*2)             /* ; pcm+=2 */
    
LoopPS
    str        I, [sp, #0]                    ; sp[0] = i (loop counter)
    str        PCM, [sp, #4]                ; sp[1] = pcm (pointer to pcm buffer)
    
    mov        SUM1LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1RL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM2LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM2RL, #RNDVAL                ; load rndVal (low 32)
    
    mov        SUM1LH, #0
    mov        SUM1RH, #0
    mov        SUM2LH, #0
    mov        SUM2RH, #0

    MC2S    0
    MC2S    1
    MC2S    2
    MC2S    3
    MC2S    4
    MC2S    5
    MC2S    6
    MC2S    7
    
    add        VB1, VB1, #(4*64)    ; vb1 += 64
    
    ldr        PCM, [sp, #4]        ; load pcm pointer
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS
    C64TOS    SUM1RL, SUM1RH, SIGN, MAXPOS
    C64TOS    SUM2LL, SUM2LH, SIGN, MAXPOS
    C64TOS    SUM2RL, SUM2RH, SIGN, MAXPOS
    
    ldr        I, [sp, #0]            ; load loop counter
    add        CF2, PCM, I, lsl #3    ; CF2 = PCM + 4*i (short offset)
    strh    SUM2LL, [CF2], #2    ; *(pcm + 2*2*i + 0)
    strh    SUM2RL, [CF2], #2    ; *(pcm + 2*2*i + 1)

    strh    SUM1LL, [PCM], #2    ; *(pcm + 0)
    strh    SUM1RL, [PCM], #2    ; *(pcm + 1)
    
    subs    I, I, #1
    bne        LoopPS

    ; restore stack pointer
    add        sp, sp, #8

    ldmfd    sp!, {r4-r11, pc}
    ENDFUNC

;; MONO PROCESSING

    ; MC0M - process 2 taps, 1 sample (sample 0)
    ;   x = vb1 offset
    MACRO    
    MC0M    $x

    ldr        CF1, [COEF], #4
    ldr        CF2, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    ldr        VHI, [VB1, #(4*(23 - $x))]

    rsb        CF2, CF2, #0
    smlal    SUM1LL, SUM1LH, VLO, CF1
    smlal    SUM1LL, SUM1LH, VHI, CF2

    MEND    ; MC0M

    ; MC1M - process 2 taps, 1 sample (sample 16)
    ;   x = vb1 offset
    MACRO    
    MC1M    $x

    ldr        CF1, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    smlal    SUM1LL, SUM1LH, VLO, CF1
    
    MEND    ; MC1M

    ; MC2M - process 2 taps, 2 samples
    ;   x = vb1 offset
    MACRO    
    MC2M    $x

    ; load data as far as possible in advance of using it
    ldr        CF1, [COEF], #4
    ldr        CF2, [COEF], #4
    ldr        VLO, [VB1, #(4*($x))]
    ldr        VHI, [VB1, #(4*(23 - $x))]

    smlal    SUM1LL, SUM1LH, VLO, CF1
    smlal    SUM2LL, SUM2LH, VLO, CF2
    rsb        CF2, CF2, #0
    smlal    SUM1LL, SUM1LH, VHI, CF2
    smlal    SUM2LL, SUM2LH, VHI, CF1

    MEND    ; MC2M

; void PolyphaseMono(short *pcm, int *vbuf, const int *coefBase)

xyyx_PolyphaseMono    FUNCTION
    EXPORT    xyyx_PolyphaseMono

    stmfd    sp!, {r4-r11, r14}
    
    ; clear out stack space for 4 local variables (4 bytes each)
    sub        sp, sp, #8
    str        PCM, [sp, #4]            ; sp[1] = pcm pointer

    ; special case, output sample 0
    mov        SUM1LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1LH, #0

    MC0M    0
    MC0M    1
    MC0M    2
    MC0M    3
    MC0M    4
    MC0M    5
    MC0M    6
    MC0M    7

    ldr        PCM, [sp, #4]        ; load pcm pointer
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS
    strh    SUM1LL, [PCM, #(2*0)]

    ; special case, output sample 16
    add        COEF, COEF, #(4*(256-16))    ; coef = coefBase + 256 (was coefBase + 16 after MC0M block)
    add        VB1, VB1, #(4*1024)            ; vb1 = vbuf + 64*16
    
    mov        SUM1LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1LH, #0

    MC1M    0
    MC1M    1
    MC1M    2
    MC1M    3
    MC1M    4
    MC1M    5
    MC1M    6
    MC1M    7

    ldr        PCM, [sp, #4]        ; load pcm pointer
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS

    strh    SUM1LL, [PCM, #(2*16)]

    ; main convolution loop: sum1L = samples 1, 2, 3, ... 15   sum2L = samples 31, 30, ... 17
    sub        COEF, COEF, #(4*(264-16))    ; coef = coefBase + 16 (was coefBase + 264 after MC1M block)
    sub        VB1, VB1, #(4*(1024-64))    ; vb1 = vbuf + 64 (was vbuf + 64*16 after MC1M block)
    mov        I, #15                        ; loop counter, count down
    add        PCM, PCM, #(2)                ; pcm++
    
LoopPM
    str        I, [sp, #0]                    ; sp[0] = i (loop counter)
    str        PCM, [sp, #4]                ; sp[1] = pcm (pointer to pcm buffer)
    
    mov        SUM1LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM2LL, #RNDVAL                ; load rndVal (low 32)
    mov        SUM1LH, #0
    mov        SUM2LH, #0

    MC2M    0
    MC2M    1
    MC2M    2
    MC2M    3
    MC2M    4
    MC2M    5
    MC2M    6
    MC2M    7
    
    add        VB1, VB1, #(4*64)    ; vb1 += 64
    
    ldr        PCM, [sp, #4]        ; load pcm pointer
    mov        MAXPOS, #0x7f00
    orr        MAXPOS, MAXPOS, #0xff
    
    C64TOS    SUM1LL, SUM1LH, SIGN, MAXPOS
    C64TOS    SUM2LL, SUM2LH, SIGN, MAXPOS
    
    ldr        I, [sp, #0]            ; load loop counter
    add        CF2, PCM, I, lsl #2    ; CF2 = PCM + 2*i (short offset)
    strh    SUM2LL, [CF2], #2    ; *(pcm + 2*i + 0)
    strh    SUM1LL, [PCM], #2    ; *(pcm + 0) ; pcm++
    
    subs    I, I, #1
    bne        LoopPM

    ; restore stack pointer
    add        sp, sp, #8

    ldmfd    sp!, {r4-r11, pc}
    ENDFUNC

    END

Hope it could help.

repzak · 2009-04-23 09:10:26

Hello,

I will try to have a look...

I just wonder how keil compiler can handle this, maybe it has some methodes to translate this

well, i must try to have a look, seems just quite imposible, also because this file is a part of a huge library, so i don't know the exact function of the codes...

Kasper

Francis · 2009-04-23 09:49:13

I guess that it is the resulting code of a C library...

repzak · 2009-04-23 20:12:57

Hello,

I think i managed the rest now

faced this new issue:
c:/program files/raisonance/ride/arm-gcc/bin/../lib/gcc/arm-none-eabi/4.3.2/../../../../arm-none-eabi/lib/thumb2\libc.a(lib_a-sbrkr.o): In function `_sbrk_r':
sbrkr.c.text+0x12): undefined reference to `_sbrk'

Something to do with malloc i assume?

Kasper

Francis · 2009-04-24 06:29:45

I remember some old issues about sbrk... I will ask my colleagues. Perhpas in the Raisonance forum if you don't find anything here.

VincentC · 2009-04-24 09:19:12

Hi,

For using malloc, and some other library functions, you need the function _sbrk for checking that there is no collision between the heap and the stack.

This function is provided in the syscalls.c file, which is in the IO_Putchar library. So you can either include this library in your link by activating the associated option, or you can take the syscalls.c file from the source of the library and add it in your application:
<Ride>\lib\ARM\io_putchar\syscalls.c

I hope it helps,

Best Regards,

Vincent

repzak · 2009-04-24 16:22:24

Hello,

Good stuff

Now is it soon testing time

Thank you for your great support

Kasper

repzak · 2009-04-27 18:41:43

VincentC,

Sorry i have to bother you again with my stupid questions

I managed to get my project compiled and running with both adding the syscalls.c and by activating the option.., so i thought things was fine, but when i make the library i don't have the option in the GUI.., then i just added the syscalls.c to my library, as working in my normal project.. all compilation works fine, but whe n i want to add the lib with circle_mgr i complains about it can't find the _sbrk.. "undefined reference to `_sbrk'"

How can i get the linker in circle_mgr to find this function??

Kasper

VincentC · 2009-04-28 08:09:07

Hi,

Here is my guess at what happens:
The gcc linker is a one-pass linker. That means it looks at the input files in the order they are fed to it and doesn't go back, unless you explicitly tell it to. Your library contains some functions that are calling malloc or other functions from the standard libraries, that themselves call _sbrk, which is in your library. At first glance everything should be fine... But the linker scans your library first, and at that time it doesn't know that it needs _sbrk, so it does not take it. Then it scans the standard libraries and takes malloc. But then it will not go back on your library to find _sbrk.

There are several ways to force the linker to take _sbrk.

1. Use the '-u __sbrk' linker command in the 'LD Linker'/'More' option. See the ld doc for more information.

2. Reference _sbrk directly from one of your functions. For example declare a local volatile pointer in your main function and initialize it to the address of _sbrk.

3. Use the KEEP keyword in your linker script to tell the linker that it must take the section containing the _sbrk function. It's a little like solution 1, only it's in the linker script not the command-line.

4. Modify the linker script for changing the order of the libraries and eventually telling the linker to roll over. This is more complex and I don't recommend that if you are not a gcc expert.

Normally I would go for solution 1, or maybe 2. But when using Circle_Mgr, solution 2 is much more simpler, and some of the others are not possible at all.

I hope it helps.

Best Regards,

Vincent

repzak · 2009-04-28 13:46:08

Hello,

Thank you very much for your time

I think the only solution are point 1, since there is no linker settings in the library project?

I have made solution 1, and can load it into the primer through circle_mgr , but it will not work.

Sometimes everything stops when starting app. other times after showing stm32_screen, other times with white screen.

Is there any way to debug an added library this way?, because when i run the code in the debugger in a normal project it runs fine..

what is the correct way to install circle_os 3.7?, i think the factory reset bat file will give older version from january..

Is there some version number for the newest circle_mgr?

Kasper

Francis · 2009-04-28 14:10:05

To debug a library, you have to ceate your project with your files. Then, include primer2_circle.elf and fat_elf in your project (as made automatically by the wizard when you use it to create a new project).
To work with CircleOS 3.7, you have to specify the right Primer2_Circle.ELF (FAT.elf never changes).
Note that circle_mgr does not reprogram circleOS (it keeps the current one).
To get a new 'restore_factory', just go to the 'upgrade page':
http://www.stm32circle.com/resources/upgrade.php.

Francis · 2009-04-28 14:31:12

Kasper,
We don't understand your exact context. If you wish, you could send us your projects by email (we will keep them confidential if they are part of a contest project - or if they are confidential for any other reason- . We could help with more efficiency...
Francis

# 1 2009-04-19 15:58:35 Object file from other compiler...

Object file from other compiler...

# 2 2009-04-19 21:09:33 Object file from other compiler...

Re: Object file from other compiler...

# 3 2009-04-20 07:58:41 Object file from other compiler...

Re: Object file from other compiler...

repzak :

# 4 2009-04-20 09:48:29 Object file from other compiler...

Re: Object file from other compiler...

Code:

Code:

# 5 2009-04-20 10:15:59 Object file from other compiler...

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# 6 2009-04-20 10:38:33 Object file from other compiler...

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# 7 2009-04-22 17:41:45 Object file from other compiler...

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# 8 2009-04-23 09:01:13 Object file from other compiler...

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Code:

# 9 2009-04-23 09:10:26 Object file from other compiler...

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# 10 2009-04-23 09:49:13 Object file from other compiler...

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# 11 2009-04-23 20:12:57 Object file from other compiler...

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# 12 2009-04-24 06:29:45 Object file from other compiler...

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# 15 2009-04-27 18:41:43 Object file from other compiler...

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# 19 2009-04-28 14:31:12 Object file from other compiler...

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