We have a STM32F10x Cortex M3-based project. The project is built using IAR EWARM 5.4. We have purchased EWARM 6.21 and have attempted to build the project code with this - unsuccessfully. The build completes fine and I have successfully flashed the device. However, I'm getting an exception. I'm new to this platform and environment - so forgive me if I'm missing something obvious. I've stepped through this exact code in the EW 5.4 build - and the code looks exactly the same. On EW 6.21 - when I hit the instruction at 0x8016E0E, the PC jumps to 0x080048A6 - and IPSR gets set to 3. I'm assuming that means its a hard fault exception.
The value loaded into R1 is 0x40022000 - the proper address of the FLASH_ACR. I have no idea why reading from that address is causing an exception - and only when running the EW 6.21 build. Any thoughts?
Here's the code from the EW 6.21 disassembly:
FLASH_SetLatency:
0x8016e0c: 0x490b LDR.N R1, [PC, #0x2c] ; [0x8016e3c] FLASH_ACR
0x8016e0e: 0x7809 LDRB R1, [R1]
0x8016e10: 0xf011 0x0138 ANDS.W R1, R1, #56 ; 0x38
0x8016e14: 0x4a09 LDR.N R2, [PC, #0x24] ; [0x8016e3c] FLASH_ACR
0x8016e16: 0x6011 STR R1, [R2]
0x8016e18: 0x4908 LDR.N R1, [PC, #0x20] ; [0x8016e3c] FLASH_ACR
0x8016e1a: 0x6809 LDR R1, [R1]
0x8016e1c: 0x4301 ORRS R1, R1, R0
0x8016e1e: 0x4a07 LDR.N R2, [PC, #0x1c] ; [0x8016e3c] FLASH_ACR
0x8016e20: 0x6011 STR R1, [R2]
0x8016e22: 0x4770 BX LR
Thanks,
-Chris
