STM CircleOS forum / Exti + Irq setup

diabolo38 · 2010-06-30 16:07:54

No way to triger an ext interrupt using a gpio despite everything seam to be configured well (GPIO, EXTI routing, EXTI mask and pending) i can see gpio input bit set and also that exti pending bit is set as well

I can manulay clear and set again the exti pending bit but still i never reach the breakpoint in the IrqHandler ?

I've been debgguin this all teh afteroon but did not found any reason why this is not working . So i'm supecting the vector or ?NVIC not well setup but why?
Here is the code

Code:

#define BIT_BAND_BASE   PERIPH_BB_BASE
#define BIT_WORD_OFFSET(addr, bitno) (((addr-PERIPH_BASE)*32) + (bitno*4))
#define BIT_WORD_ADDR(addr, bitno)  (BIT_BAND_BASE + BIT_WORD_OFFSET(addr, bitno))
#define BIT_WORD_PTR(ptr, bitno) ((int*)(BIT_WORD_ADDR(((unsigned)ptr), bitno)))

#define CAP_EXTI_LINE_NO   0
#define CAP_EXTI_LINE   (1<<CAP_EXTI_LINE_NO)
#define CAP_EXTI_PORT_SRC  GPIO_PortSourceGPIOD
#define CAP_EXTI_BIT_SRC   GPIO_PinSource0
//=> D.0 => EXTI.0
#define CAP_IRQ_CHANNEL EXTI0_IRQChannel
#define CAP_IRQ_PRI 1   //same as timer 2
#define CAP_IRQ_SUBPRI 1 //same as timer 2

void Cap_IrqHandler( void ) __attribute__ ((interrupt ("IRQ")));

void CapInteruptConfig()
{
NVIC_InitTypeDef  NVIC_InitStructure;
EXTI_InitTypeDef  EXTI_InitStructure;


    GPIO_EXTILineConfig(CAP_EXTI_PORT_SRC, CAP_EXTI_BIT_SRC);
    EXTI_InitStructure.EXTI_Line = CAP_EXTI_LINE;
    EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
    EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
    EXTI_InitStructure.EXTI_LineCmd = ENABLE;
    EXTI_Init(&EXTI_InitStructure);  

    OldCapHandler=UTIL_GetIrqHandler(CAP_IRQ_CHANNEL*4);
    UTIL_SetIrqHandler(CAP_IRQ_CHANNEL*4, &Cap_IrqHandler);

    NVIC_InitStructure.NVIC_IRQChannel                    = CAP_IRQ_CHANNEL ;
    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority  = CAP_IRQ_PRI; 
    NVIC_InitStructure.NVIC_IRQChannelSubPriority         = CAP_IRQ_SUBPRI;
    NVIC_InitStructure.NVIC_IRQChannelCmd                 = ENABLE;
    NVIC_Init(&NVIC_InitStructure);
    
}

void Exti_SetLineMask(int LineNo, int mask )
{
volatile int *pBitWord=BIT_WORD_PTR(&EXTI->IMR, LineNo);
    
    *pBitWord=mask;
}

void CapIntPrepareForCap()
{
    // at EXTI level clear pending bit  and enable mask 
    EXTI_ClearITPendingBit(CAP_EXTI_LINE);
    Exti_SetLineMask(CAP_EXTI_LINE_NO, 1);
}

What's i foudn weired is that prior to the vector setup the vector seam to hold uncorrect address ??

vector 6 (exti0) is 0x08000B41 but the dummy handler is located at 0x08000B44 further more 0x08000B41 isn't 32 bit aligned ?

Same hapen after i set the new vector

After verification the value passed to SetIrq is misaligned ( aligned adress +1)?? some weired thing but anyway even pacthing adress by hand do not help to trigger the handler?

So it is lileky that NVIC is not firing the EXTI0 vector but why ? is there any setup i've missed ?

thanks in advance

Last edited by diabolo38 (2010-06-30 16:11:43)

ntrf.zns · 2010-06-30 19:26:22

On ARM lowest bit of address is indicating execution mode for processor: ARM or Thumb. Cortex-M3 uses Thumb-2.

diabolo38 · 2010-07-01 09:17:41

Ok thanks for the information so there is nothing strange about the address.

By the way i got it to work i was not setting the correct vector, irq channel ext0 is define to be 6 so i was setting vector table entry "6" at offset 6*4 but it'is would have been to to simple if it was so straight forward ... irq chanel X t vector offset is actualy 0x40+X*4 ..
this was not explicit in the STM library (they use static vector table) it was not more obvious on the Circle Set vector code/doc.

Actually i feel it could be best if UTIL_SetIrqHandler would expect an "irq channel no" rather than an offset (e can actualy passe an unaligned offset and get a fault), also curent code let user the possibilty to set the default system fault handler (NMI, Debug, etc..)
I believe something lilke this would be safer

Code:

void UTIL_SetIrqHandler( uint32_t IrqChannel, tHandler pHDL )
    {


#ifdef PRIMER1
    if ( IrqChannel< (0x100-0x40)/4 )
#else
    if ( IrqChannel< (0x140-0x40)/4 ) // KJ20090320 - Changed from 120
#endif
       ((tHandler *)( CIRCLEOS_RAM_BASE+0x40 ))[IrqChannel] = pHDL;
    }

ntrf.zns · 2010-07-01 10:22:19

I used following code to set timer6 interrupt on overflow.

Code:

    UTIL_SetIrqHandler((TIM6_IRQn << 2) + 0x40,callback);
    NVIC_EnableIRQ(TIM6_IRQn);
    TIM6->DIER = 1;

GarrySmith · 2011-02-08 09:08:10

diabolo38,
Thanks for writing this up. I've been there as well. Was disappointed with the lack of documentation of the APIs. DOxygen is producing the Docs from code, why can't there be a bit more information in the code to state what SetIrqHandler (among others) requires for parameters. I've lost 10+ hours trying to work this out. (was just one step short of getting it. (0x40 offset)). .......

It's not that easy to chase this sort of thing. STM32Fxxx are jammed with options, GCC compilier on top of that, RLink, circle_OS and the GUI, manuals in single de-oxygen html pages, and the abstraction of the stmLib all combine to make this sort of problem a difficult exercise to solve.

well there is my two cents worth.

yrt · 2011-02-09 07:18:02

You will find some explanations (not all I agree...) in theses resources files :http://www.stm32circle.com/resources/do … eption.pdf and http://www.stm32circle.com/resources/do … Manual.pdf

# 1 2010-06-30 16:07:54 Exti + Irq setup

Exti + Irq setup

Code:

# 2 2010-06-30 19:26:22 Exti + Irq setup

Re: Exti + Irq setup

# 3 2010-07-01 09:17:41 Exti + Irq setup

Re: Exti + Irq setup

Code:

# 4 2010-07-01 10:22:19 Exti + Irq setup

Re: Exti + Irq setup

Code:

# 5 2011-02-08 09:08:10 Exti + Irq setup

Re: Exti + Irq setup

# 6 2011-02-09 07:18:02 Exti + Irq setup

Re: Exti + Irq setup

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